Citation :

Reena Kumari, Mohammad Ismail Khattab, 2023. "On-Chip Permutations Network Design with a Three-Dimensional Mesh Network" ESP International Journal of Communication Engineering & Electronics Technology (ESP- IJCEET)  Volume 1, Issue 2 : 25-32

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Abstract :

     The network on chip (NoC) is being investigated as an on-chip communication fabric for future multiprocessor system on chips (MPSOCs) because of its adaptability, scalability, and high bandwidth. My abstract describes the methodology behind the construction of a network-on-chip that can sustain a specified throughput. Using three layers of 4-port switches in a closed network configuration. For system-on-chip applications involving multiple processors, this network is built to guarantee a specific traffic permutation. The proposed network utilizes a dynamic path-setup mechanism in conjunction with a pipelined circuit-switching methodology to allow for path arrangement for arbitrary traffic permutations at runtime. It is common for IP cores in a SoC to communicate with one another via a "network on chip," or NoC.

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Keywords :

     NoC, MPSOCs, Pipelined Circuit.